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ADI ADCLK954: Two Selectable Inputs, 12 LVPECL Outputs, SiGe Clock Fanout Buffer

 2009-05-15

What is it?
The ADCLK954 is an ultrafast clock/data fan-out buffer fabricated on the Analog Devices, Inc., proprietary XFCB3 silicon germanium (SiGe) bipolar process. This device is designed for high speed applications requiring low jitter. The reference signal is selected between two differential inputs using a control pin. Each input has a center tapped, 100 Ω, on-chip termination resistor and accepts DC-coupled LVPECL and AC-coupled 1.8V CMOS, LVDS, and LVPECL inputs. The ECL output stages are designed to directly drive 800 mV each side into 50 Ω terminated to VCC - 2 V for a total differential output swing of 1.6 V. The ADCLK954 is available in a 40-lead LFCSP package. It is specified for operation over the standard industrial temperature range: –40°C to +85°C.

How is it used?
* Low jitter clock distribution
* Clock and data signal restoration
* Level translation
* Wireless communications
* Wired communications
* Medical and industrial imaging
* ATE and high performance instrumentation

What are the key features and customer benefits?
* 2 selectable differential inputs
* 5 GHz operating frequency
* 100 fs wideband random jitter
* 150 ps propagation delay
* 75 ps output rise/fall
* 25 ps output-to-output skew
* On-chip terminations at both input pins
* 3.3 V power supply

End Market:
Comms - Broadband; Comms - Other; I & I - Instrumentation; Comms - WireLess; I & I - Medical; Mil / Aero; Comms - Optical; I & I - Industrial; ATE

Who are the potential customers?
Customers require low jitter clock buffers to optimize their timing signal chains. In systems where multiple copies of a clean signal are needed, clock buffers offering the lowest amount of added jitter help improve SNR, BER, and signal integrity in user's systems. The ADCLK954 provides added flexibility for customers already designing with ADI's AD95xx family of clock generators.