EMCP MT29TZZZ5D6YKFAH-125 W.96N
【產品特性】‧JEDEC/MMC standard version 5.0-compliant
(JEDEC Standard No. JESD84-B50) 1
‧ Backward compatible with previous MMC
‧Advanced 12-signal interface
‧x1, x4, and x8 I/Os, selectable by host
‧SDR/DDR modes up to 52 MHz clock speed
‧Replay-protected memory block (RPMB)
‧Multiple partitions with enhanced attribute
【文字介紹】Micron MCP products combine e·MMC and Mobile LPDRAM devices in a single MCP. These products target mobile applications with low-power, high-performance, and minimal package-footprint design requirements. The NAND Flash and Mobile LPDRAM devices are also members of the Micron discrete memory products portfolio.
The e·MMC and Mobile LPDRAM devices are packaged with separate interfaces (no shared address, control, data, or power balls). This bus architecture supports an optimized
interface to processors with separate e·MMC and Mobile LPDRAM buses. The e·MMC and Mobile LPDRAM devices have separate core power connections and share a common ground (that is, VSS is tied together on the two devices).