代理产线

Telemaco3 family of telematics and connectivity processors

 2017-05-10

【基本数据】

【产品特性】

Core and infrastructure
• ARM® Dual Core CortexA7 up to 60 0 MHz,with NEON instructions
• Memory organization:
– L 1 Cache: 32 KB instruction, 32 KB data
– 2 56 KB L2 Cache
– T otal 768 KB embedded SRAM
– 1 6/32-bit DDR3 Controller at 667 MHz
– Serial SQI NOR interface
– 16bit Parallel NAND Controller
• 32-bit watchdog timer
• 16-channels DMA
• 8x 32-bit free running times/counters
• 5x 16-bit extended function timer (EFT) with input capture/output compare and PWM
• Real time clock (RTC) with fraction readout

Media interfaces
• 3x Secure-digital multimedia memory card

Interface
• 2x USB 2.0 Dual Role with integrated PHY;charger function supported
• 1x RMII/RGMII Ethernet AVB MAC

Embedded secure vehicle interface microcontroller
• Dedicated Cortex M3 core
• 256 KB Isolated embedded memory (part of the total 768 KB core eSRAM)
• Secured NOR interface
• 3x CAN port, 2x supporting FD CAN
• Hardware Crypto Engine
• Programmable OTP for key storage, lifecycle management, anti-rollback

【产品应用】

STA1195 processing capability relies on an ARM Dual Cortex-A7 running at up to 600MHz, delivering ~2400 DMIPS with minimal heat dissipation requirements. The application processor has 32 KB of instruction cache and 32 KB of data cache, as well as 256 KB of L2 cache for high throughput and low latency tasks. The dual core implementation is equipped with a dedicated PLL and power domain, in order to achieve best thermal/MIPS performance compromise in all application scenarios.
The application processor is connected to the system via an efficient bus matrix infrastructure, implementing flexible QoS and trust zone features.

【文字介绍】

STA1195 is a fully automotive, multi-processor System-On-Chip, targeting processor-centric Telematics Applications offering superior processing power for high-bandwidth data traffic management.
It features:
 A powerful Dual CortexA7 processor;
 A dedicated ARM - Cortex M3 controller for real-time CAN / Vehicle Interface
Processing;
 An HW Crypto engine for efficient security performances;
 A complete set of standard connectivity interfaces including 1Gbit Ethernet;
 An optional Audio Subsystems tailored to Audio Connectivity applications (i.e. Sound
Boxes).