代理產線

5.7 kVrms Split O/P, Reinforced Isolated IGBT Gate Driver ISO5852S

 2017-01-18

【基本資料】

【產品特性】

‧100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM = 1500 V
‧Split Outputs to Provide 2.5-A Peak Source and
‧5-A Peak Sink Currents
‧Short Propagation Delay: 76 ns (Typ),
‧110 ns (Max)
‧2-A Active Miller Clamp
‧Output Short-Circuit Clamp
‧Soft Turn-Off (STO) during Short Circuit
‧Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
‧Input and Output Under Voltage Lock-Out (UVLO) with Ready (RDY) Pin Indication
‧Active Output Pull-down and Default Low Outputs with Low Supply or Floating Inputs
‧2.25-V to 5.5-V Input Supply Voltage
‧15-V to 30-V Output Driver Supply Voltage
‧CMOS Compatible Inputs
‧Rejects Input Pulses and Noise Transients Shorter Than 20 ns
‧Operating Temperature: –40°C to 125°C Ambient
‧Surge Immunity 12800-VPK (according to IEC 61000-4-5)
‧Safety and Regulatory Certifications:
‧8000-VPK VIOTM and 2121-VPK VIORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
‧5700-VRMS Isolation for 1 Minute per UL 1577
‧CSA Component Acceptance Notice 5A, IEC 60950-1, IEC 60601-1 and IEC 61010-1 End Equipment Standards
‧CQC Certification per GB4943.1-2011
‧All Certifications are Planned

【產品應用】

‧Industrial Motor Control Drives
‧Industrial Power Supplies
‧Solar Inverters
‧HEV and EV Power Modules
‧Induction Heating

【文字介紹】

The ISO5852S is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15-V to maximum
30-V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns assures accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a Mute logic immediately blocks the output of the isolator and initiates a soft-turn-off procedure which disables, OUTH, and pulls OUTL to low over a time span of
2 μs. When OUTL reaches 2 V with respect to the most negative supply potential, VEE2, the gate driver output is pulled hard to VEE2 potential turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turn-off period. The FLT output condition is latched and can be reset only after RDY goes high, through a low-active pulse at the RST input.